Purpose
The RT7298BL is a synchronous step-down converter with current mode control, which can deliver up to 6A output current from a wide input voltage range of 4.5V to 18V.This document explains the function and use of the RT7298BL evaluation board (EVB) and provides information to enable operation and modification of the evaluation board and circuit to suit individual requirements.
Introduction
General Product Information
The RT7298BL is a high efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to 6A output current from a 4.5V to 18V input supply. The RT7298BL current-mode architecture with external compensation allows the transient response to be optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during startup. Fault condition protections include output under-voltage protection, output over-voltage protection, and over temperature protection. The low current shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. The RT7298BL is available in WQFN-14AL 3.5x3.5 package.
Product Feature
- Low RDS(ON) Power MOSFET Switches 26mΩ/19mΩ
- Input Voltage Range : 4.5V to 18V
- Adjustable Switching Frequency : 200kHz to 1.6MHz
- Current-Mode Control
- Synchronous to External Clock : 200kHz to 1.6MHz
- Accurate Voltage Reference : 0.6V ± 1.25%
- Monotonic Start-Up into Pre-biased Outputs
- Adjustable Soft-Start
- Power Good Indicator
- Under-Voltage and Over-Voltage Protection
- Input Under-Voltage Lockout
- RoHS Compliant and Halogen Free
Key Performance Summary Table
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Key Features
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Evaluation Board Number: PCB006_V1
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Default Input Voltage
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12V
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Max Output Current
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6A
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Default Output Voltage
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1.0V
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Default Marking & Package Type
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RT7298BLGQW, WQFN-14AL 3.5x3.5
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Operation Frequency
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Steady 500kHz at all loads
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Other Key Features
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4.5V to 18V Input Voltage Range
Programmable Soft-Start, Adjustable Switching Frequency
Synchronous to External Clock
Power Good Indicator
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Protection
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Output Under-Voltage Protection (Latch-Off mode)
Output Over-Voltage Protection
Cycle-by-cycle Current Limit
Thermal Shutdown
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Bench Test Setup Conditions
Headers Description and Placement
Please carefully inspect the EVB IC and external components, comparing them to the following Bill of Materials, to ensure that all components are installed and undamaged. If any components are missing or damaged during transportation, please contact the distributor or send e-mail to evb_service@richtek.com
Test Points
The EVB is provided with the test points and pin names listed in the table below.
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Test point/
Pin name
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Signal
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Comment (expected waveforms or voltage levels on test points)
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VIN, VIN_EXT
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Input voltage
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Input voltage range= 4.5V to 18V
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VOUT
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Output voltage
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Default output voltage = 1.0V
Output voltage range= 0.6V to 8V
(see ‘’ Output Voltage Setting’’ section for changing output voltage level)
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LX
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Switching node test point
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LX waveform
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EN
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Enable test point
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Enable signal. Floating this EN pin or connecting this pin to pull high enable operation; connecting this pin to GND can disable the device.
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SYNC
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Ext Frequency Sync Input
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External Frequency Synchronization Input. Connecting external clock to this pin changes the switching frequency.
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BS
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Boot strap supply test point
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Floating supply voltage for the high-side N-MOSFET switch
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GND
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Ground
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Ground
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SS
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Soft-start control test point
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Soft start waveform
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VCC_EXT
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External Voltage for PG
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External voltage terminal for PG pull-up voltage.
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PG
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Power good output test point
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Connected to VCC_EXT through RPG1, Power Good Indicator
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JP2
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VIN & PVIN control
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Install jumper to combine or separate VIN and PVIN.
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JP1
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PG control
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VIN voltage terminal for PG pull-up voltage.
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J9
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Chip enable control
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Install jumper or drive EN directly to enable or disable operation
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Power-up & Measurement Procedure
1.Connect input power (4.5V < VIN < 18V) and input ground to VIN and GND test pins respectively.
2.Connect positive end and negative terminals of load to VOUT and GND test pins respectively.
3.There is a 3-pin header “EN” for enable control. To use a jumper at “H” option to tie EN test pin to input power VIN for enabling the device. Inversely, to use a jumper at “L” option to tie EN test pin and ground GND for disabling the device.
4.The PVIN and VIN pins can be connected together using a jumper across “Combine” by the 3-pin header JP2. Inversely, these two input rails can be separated by using a jumper across “Separate” if desired.
5.The 2-pin header JP1 “VIN-PG” is for PGOOD pin supply, when using a jumper across this header, the PG signal can be supplied by VIN pin Voltage.
6.Verify the output voltage (approximately 1.0V) between VOUT and GND.
7.Connect an external load up to 6A to the VOUT and GND terminals and verify the output voltage and current.
Output Voltage Setting
Set the output voltage with the resistive divider (R1, R2) between VOUT and GND with the midpoint connected to FB. The output is set by the following formula:
The installed VOUT capacitors (C5, C6) are 22μF, 16V X5R ceramic types. Do not exceed their operating voltage range and consider their voltage coefficient (capacitance vs. bias voltage) and ensure that the capacitance is sufficient to maintain stability and provide sufficient transient response for your application. This can be verified by checking the output transient response as described in the RT7298B IC datasheet.
Schematic, Bill of Materials & Board Layout
EVB Schematic Diagram
C4: 10μF/50V/X5R, 1206, TDK C3216X5R1H106K
C2, C5, C6: 22μF/16V/X5R, 1210, Murata GRM32ER61C226K
L1: 1.4μH TAIYO YUDEN NR8040T1R4N, DCR=7mΩ
Bill of Materials
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Reference
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Qty
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Part number
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Description
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Package
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Manufacture
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U1
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1
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RT7298BLGQW
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DC-DC Converter
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WQFN-14AL 3.5x3.5
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RICHTEK
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C4
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1
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C3216X5R1H106K160AB
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10μF/±10%/50V/X5R
Ceramic Capacitor
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1206
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TDK
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C2, C5, C6
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3
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GRM32ER61C226KE20#
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22μF/±10%/16V/X5R
Ceramic Capacitor
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1210
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Murata
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CSS
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1
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GRM32MR71H103KA01#
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10nF/±10%/50V/X7R
Ceramic Capacitor
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0603
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Murata
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CCOMP1
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1
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GRM31CR71A822KA01
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8.2nF/±10%/50V/X7R
Ceramic Capacitor
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0603
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Murata
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CCOMP2
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1
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0603B181K500CT
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180pF/±10%/50V/X7R
Ceramic Capacitor
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0603
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WALSIN
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C3, C7, CBOOT
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3
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C1608X7R1H104K080AA
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0.1μF/±10%/50V/X7R
Ceramic Capacitor
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0603
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TDK
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C1, CFF, C2F, CEN, REN2, RTR1, RTR2, RPG2, D1
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0
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Not Installed
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0603
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L1
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1
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NR8040T1R4N
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1.4μH/9.0A/±30%, DCR=7mΩ, Inductor
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8mmx8mmx4mm
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TAIYO YUDEN
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R1
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1
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16kΩ/±1%, Resistor
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0603
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R2
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1
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24kΩ/±1%, Resistor
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0603
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RCOMP
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1
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0.68kΩ/±1%,
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0603
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RT, REN1, RPG1
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3
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100kΩ/±1%,
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0603
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JP1
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1
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2-Pin Header
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JP2, J9
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2
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3-Pin Header
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GP
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11
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VIN_EXT, BS, SS, TRACK, EN, LX, SYNC, PG, VCC_EXT, VIN, GND
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Golden Pin
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J3, J4
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2
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VOUT, GND
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Test Pin
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EVB Layout
Top View (1stlayer)
Bottom View (4th Layer)
Component Placement Guide—Component Side (1stlayer)
PCB Layout—Component Side (1stLayer)
PCB Layout—Bottom Side (4th layer)