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NAB Sr. DV Engineer

Location: San Jose CA, Allentown PA, Colorado Springs CO, Vancouver WA

Job Description
Richtek is seeking a Sr. Design Validation (DV) Engineer for our North American Business Group. Multiple positions are available in the following product areas: Hot-Swap and Electronic Circuit Breakers, Switch-Mode Power Supplies, A/D and D/A converters, High Efficiency Power Stages and Power Monitoring functions. Process technologies include advanced CMOS and BCD technology. Tasks include product definition, architecture development, circuit design and simulation, layout oversight, silicon debug, characterization, datasheet generation and production release/support. Projects must be taken from definition through production release.

In your role as Sr. Design Validation (DV) Engineer you will be responsible for the Verilog HDL based digital design & verification, synthesis, simulation and STA, DFT (scan insertion, ATPG), understanding of transistor level digital design, microcontroller core based product architecture, complete Mixed-Signal product development flow.  Low level programming skills using Microsoft Visual Studio and other commercial IDEs is required.


  • Define block and chip level verification strategies based on design requirements and architecture
  • Develop test bench environment(s) and directed, random, and constrained random tests. Implement Coverage driven verification methodologies. Come up with functional coverage metrics.
  • Develop test plans, and all necessary tools and scripts to write, execute and debug tests, employ formal verification methods such as assertions
  • Report and coordinate all aspects of the verification task in all phases of the project
  • Run RTL and gate simulations based on use case scenarios, and debug failures
  • Work with designers to achieve code coverage targets
  • Assess new tools and methods to improve existing verification methodologies
  • Develop and mentor junior engineers


The ideal candidate must have a successful track record of defining and designing high-performance power management products that have had commercial success.

  • BS or MS with 10+ years of experience in digital verification. Degree should be in EE or CS or related field.
  • Advanced knowledge of standard ASIC verification flows including testbench development using UVM methodology, integrating C models using DPI, simulation, assertions, functional pattern generation for post silicon testing
  • Strong knowledge of testbench automation, bug tracking, and regression mechanisms.
  • Excellent knowledge of Verilog and System Verilog
  • Experience with scripting languages such as Perl, Tcl, Python
  • Experience in chip top level integration
  • Good knowledge of C / C++
  • Self-motivated team player with the ability to work independently and interface effectively with engineers across divisions and remote locations
  • Desired - Experience with embedded ARM (or similar RISC) processors and C/assembly coding for test development
  • Desired - Experience in verification of mixed signal designs and modeling of analog functions